llvm-rtdyld-9 (1) Linux Manual Page
NAME
llvm-rtdyld – manual page for llvm-rtdyld 9
DESCRIPTION
OVERVIEW: llvm MC-JIT tool
USAGE: llvm-rtdyld [options] <input files> –args <program arguments>…
OPTIONS:
Color Options:
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–color– Use colors in output (default=autodetect)
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–aarch64-neon-syntax=<value> – Choose style of NEON code to emit from AArch64 backend:- =generic
- – Emit generic NEON assembly
- =apple
- – Emit Apple-style NEON assembly
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–amdgpu-disable-loop-alignment– Do not align and prefetch loops–amdgpu-disable-power-sched– Disable scheduling to minimize mAI power bursts–amdgpu-dpp-combine– Enable DPP combiner–amdgpu-dump-hsa-metadata– Dump AMDGPU HSA Metadata–amdgpu-enable-global-sgpr-addr– Enable use of SGPR regs for GLOBAL LOAD/STORE instructions–amdgpu-enable-merge-m0– Merge and hoist M0 initializations–amdgpu-sdwa-peephole– Enable SDWA peepholer–amdgpu-spill-sgpr-to-smem– Use scalar stores to spill SGPRs if supported by subtarget–amdgpu-verify-hsa-metadata– Verify AMDGPU HSA Metadata–amdgpu-vgpr-index-mode– Use GPR indexing mode instead of movrel for vector indexing–args<string>… – <program arguments>…–arm-add-build-attributes––arm-implicit-it=<value> – Allow conditional instructions outdside of an IT block- =always
- – Accept in both ISAs, emit implicit ITs in Thumb
- =never
- – Warn in ARM, reject in Thumb
- =arm
- – Accept in ARM, reject in Thumb
- =thumb
- – Warn in ARM, emit implicit ITs in Thumb
–atomic-counter-update-promoted– Do counter update using atomic fetch add-
- for promoted counters only
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–bounds-checking-single-trap– Use one trap block per function–check=<string> – File containing RuntimeDyld verifier checks.–cost-kind=<value> – Target cost kind- =throughput
- – Reciprocal throughput
- =latency
- – Instruction latency
- =code-size
- – Code size
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–cvp-dont-add-nowrap-flags––disable-promote-alloca-to-lds– Disable promote alloca to LDS–disable-promote-alloca-to-vector– Disable promote alloca to vector–do-counter-promotion– Do counter register promotion–dylib=<string> – Add library.–emscripten-cxx-exceptions-whitelist=<string> – The list of function names in which Emscripten-style exception handling is enabled (see emscripten EMSCRIPTEN_CATCHING_WHITELIST options)–enable-cse-in-irtranslator– Should enable CSE in irtranslator–enable-cse-in-legalizer– Should enable CSE in Legalizer–enable-emscripten-cxx-exceptions– WebAssembly Emscripten-style exception handling–enable-emscripten-sjlj– WebAssembly Emscripten-style setjmp/longjmp handling–enable-gvn-memdep––enable-load-pre––enable-loop-simplifycfg-term-folding––enable-name-compression– Enable name string compression–entry=<string> – Function to call as entry point. -
- Action to perform:
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–execute– Load, link, and execute the inputs.–printline– Load, link, and print line information for each function.–printdebugline– Load, link, and print line information for each function using the debug object–printobjline– Like-printlineinfobut does not load the object first–verify– Load, link and verify the resulting memory image.–expensive-combines– Enable expensive instruction combines–gpsize=<uint> – Global Pointer Addressing Size. -
- The default size is 8.
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–hash-based-counter-split– Rename counter variable of a comdat function based on cfg hash–import-all-index– Import all external functions in index.–instcombine-code-sinking– Enable code sinking–instcombine-guard-widening-window=<uint> – How wide an instruction window to bypass looking for another guard–instcombine-max-num-phis=<uint> – Maximum number phis to handle in intptr/ptrint folding–instcombine-maxarray-size=<uint> – Maximum array size considered when doing a combine–instrprof-atomic-counter-update-all– Make all profile counter updates atomic (for testing only)–internalize-public-api-file=<filename> – A file containing list of symbol names to preserve–internalize-public-api-list=<list> – A list of symbol names to preserve–iterative-counter-promotion– Allow counter promotion across the whole loop nest.–lto-pass-remarks-filter=<regex> – Only record optimization remarks from passes whose names match the given regular expression–lto-pass-remarks-format=<format> – The format used for serializing remarks (default: YAML)–lto-pass-remarks-output=<filename> – Output filename for pass remarks–max-counter-promotions=<int> – Max number of allowed counter promotions–max-counter-promotions-per-loop=<uint> – Max number counter promotions per loop to avoid increasing register pressure too much–mcpu=<cpu-name> – Target a specific cpu type (-mcpu=,help/ for details)–memop-size-large=<uint> – Set large value thresthold in memory intrinsic size profiling. Value of 0 disables the large value profiling.–memop-size-range=<string> – Set the range of size in memory intrinsic calls to be profiled precisely, in a format of <start_val>:<end_val>–merror-missing-parenthesis– Error for missing parenthesis around predicate registers–merror-noncontigious-register– Error for register names that aren’t contigious–mhvx– Enable Hexagon Vector eXtensions–mhvx=<value> – Enable Hexagon Vector eXtensions- =v60
- – Build for HVX v60
- =v62
- – Build for HVX v62
- =v65
- – Build for HVX v65
- =v66
- – Build for HVX v66
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–mips-compact-branches=<value> – MIPS Specific: Compact branch policy.- =never
- – Do not use compact branches if possible.
- =optimal
- – Use compact branches where appropiate (default).
- =always
- – Always use compact branches if possible.
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–mips16-constant-islands– Enable mips16 constant islands.–mips16-hard-float– Enable mips16 hard float.–mno-compound– Disable looking for compound instructions for Hexagon–mno-fixup– Disable fixing up resolved relocations for Hexagon–mno-ldc1-sdc1– Expand double precision loads and stores to their single precision counterparts–mno-pairing– Disable looking for duplex instructions for Hexagon–mwarn-missing-parenthesis– Warn for missing parenthesis around predicate registers–mwarn-noncontigious-register– Warn for register names that arent contigious–mwarn-sign-mismatch– Warn for mismatching a signed and unsigned value–no-discriminators– Disable generation of discriminator information.–nvptx-sched4reg– NVPTX Specific: schedule for register pressue–poison-checking-function-local– Check that returns are non-poison (for testing)–preallocate=<ulong> – Allocate memory upfront rather than on-demand–r600-ir-structurize– Use StructurizeCFG IR pass–rdf-dump––rdf-limit=<uint> ––remarks-section– Emit a section containing remark diagnostics metadata–safepoint-ir-verifier-print-only––sample-profile-check-record-coverage=<N> – Emit a warning if less than N% of records in the input profile are matched to the IR.–sample-profile-check-sample-coverage=<N> – Emit a warning if less than N% of samples in the input profile are matched to the IR.–sample-profile-max-propagate-iterations=<uint> – Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.–speculative-counter-promotion-max-exiting=<uint> – The max number of exiting blocks of a loop to allow -
- speculative counter promotion
–speculative-counter-promotion-to-loop– When the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter- update can be further/iteratively promoted into an acyclic region.
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–summary-file=<string> – The summary file to use for function importing.–threads=<int> ––time-trace-granularity=<uint> – Minimum time granularity (in microseconds) traced by time profiler–triple=<string> – Target triple for disassembler–verify-region-info– Verify region info (time consuming)–vp-counters-per-site=<number> – The average number of profile counters allocated per value profiling site.–vp-static-alloc– Do static counter allocation for value profiler
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–help– Display available options (–help-hiddenfor more)–help-list– Display list of available options (–help-list-hiddenfor more)–version– Display the version of this program
